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38th Conference on Design Automation (DAC'01)
Dynamic Management of Scratch-Pad Memory Space
Las Vegas, Nevada, United States
June 18-June 22
ISBN: 1-58113-297-2
J. Ramanujam, Louisiana State University, Baton Rouge, LA
N. Vijaykrishnan, The Pennsylvania State University
I. Kadayif, The Pennsylvania State University
J. Irwin, The Pennsylvania State University
A. Parikh, The Pennsylvania State University
M. Kandemir, The Pennsylvania State University
Optimizations aimed at improving the efficiency of on-chip memories are extremely important. We propose a compiler-controlled dynamic on-chip scratch-pad memory (SPM) management framework that uses both loop and data transformations. Experimental results obtained using a generic cost model indicate significant reductions in data transfer activity between SPM and off-chip memory.
Index Terms:
communication-based design, network-on-chip, platform-based design, protocol stack
Citation:
J. Ramanujam, N. Vijaykrishnan, I. Kadayif, J. Irwin, A. Parikh, M. Kandemir, "Dynamic Management of Scratch-Pad Memory Space," dac, pp.690-695, 38th Conference on Design Automation (DAC'01), 2001
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