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2008 11th IEEE International Conference on Computational Science and Engineering
A High-Throughput Multi-cluster NoC Architecture
July 16-July 18
ISBN: 978-0-7695-3193-9
During the last years a large number of research works has focused on problems related to multi-core processors. Due to the possibilities of many cores, the number of opportunities in High Performance Computing (HPC) has grown a lot. In fact, new fields related to HPC and processor architecture increase the future possibilities of a Grid-on-Chip (GoC). The goal of this paper is to show a high-throughput MCNoC (Multi-Cluster Network-on-Chip) as an alternative architecture to support clusters of cores and Grid features. In this new scenario data throughput, flexibility, and scalability are very important. The results verify that MCNoC has a similar area occupation and a better data throughput than a traditional Network-on-Chip.
Citation:
Henrique C. Freitas, Philippe O. A. Navaux, "A High-Throughput Multi-cluster NoC Architecture," cse, pp.56-63, 2008 11th IEEE International Conference on Computational Science and Engineering, 2008
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