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7th IEEE International Conference on Computer and Information Technology (CIT 2007)
Indirect Tag Search Mechanism for Instruction Window Energy Reduction
Aizu-Wakamatsu City, Fukushima, Japan
October 16-October 19
ISBN: 0-7695-2983-6
Shingo Watanabe, Kyushu Institute of Technology
Akihiro Chiyonobu, Fujitsu Laboratories
Toshinori Sato, Kyushu University
Instruction window is a key component which extracts Instruction Level Parallelism (ILP) in modern out-of-order microprocessors. In order to exploit ILP for improving processor performance, instruction window size should be increased. However, it is difficult to increase the size, since instruction window is implemented by CAM whose power and delay are much large. This paper introduces a low power and scalable instruction window that replaces CAM with RAM. In this window, instructions are explicitly woken up. Evaluation results show that the proposed instruction window decreases performance by only 1.9% on average. Furthermore, dynamic energy is reduced by 67% on average and static power is reduced by 14%.
Citation:
Shingo Watanabe, Akihiro Chiyonobu, Toshinori Sato, "Indirect Tag Search Mechanism for Instruction Window Energy Reduction," cit, pp.841-846, 7th IEEE International Conference on Computer and Information Technology (CIT 2007), 2007
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