Low-power design became crucial with widespread use of the embedded systems. The embedded processors need to be efficient in order to achieve real-time requirements with low power consumption for specific algorithms. As the superset of traditional very long instruction word (VLIW) architecture, the main advantages of Transport Triggered Architecture (TTA) are its simplicity and flexibility. In TTA processors, the special function units can be utilized to in- crease performance or reduce power dissipation. Asyn- chronous circuits have characteristic of low power con- sumption and it is possible to exploit this characteristic to design embedded processors. In this article, we designed a low-power embedded processor using asynchronous func- tion units. The processor core is globally synchronous and locally asynchronous implementation using not only synchronous function units but also asynchronous function units. We also presented an efficient design flow that use asynchronous circuits in TTA framework, which is only a synchronous design environment. The test result shows that this processor has lower power dissipation than its pure synchronous version that only uses synchronous function units.