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7th IEEE International Conference on Computer and Information Technology (CIT 2007)
Enabling Reconfigurable SoC in Multimedia Processing
Aizu-Wakamatsu City, Fukushima, Japan
October 16-October 19
ISBN: 0-7695-2983-6
Ying Wang, Fudan University Shanghai, CHINA
Wei-Nan Chen, Fudan University Shanghai, CHINA
Xiao-Wei Wang, Fudan University Shanghai, CHINA
Hong-Jun You, Fudan University Shanghai, CHINA
Cheng-Lian Peng, Fudan University Shanghai, CHINA
Multimedia processor designers are always challenged by performance, cost and flexibility. Due to the technological advance in FPGA, one of the promising solutions is to enable dynamically reconfigurable SoC in multimedia application. This paper utilizes Reconfigurable SoC (RSoC) in multimedia processing. We propose a feasible run-time reconfigurable system where dynamically Reconfigurable Processing Unit (RPU) is integrated with General Purpose Processor (GPP) at different abstraction level. Furthermore, a simple analysis on performance improvement is given accordingly. As a proof-of-concept, an RSoC prototype based on Xilinx Virtex-II Pro FPGA is also presented at last.
Citation:
Ying Wang, Wei-Nan Chen, Xiao-Wei Wang, Hong-Jun You, Cheng-Lian Peng, "Enabling Reconfigurable SoC in Multimedia Processing," cit, pp.811-816, 7th IEEE International Conference on Computer and Information Technology (CIT 2007), 2007
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