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Sixth IEEE International Conference on Computer and Information Technology (CIT'06)
High Performance and Area-Efficient Circuit-Switched Network on Chip Design
Seoul, Korea
September 20-September 22
ISBN: 0-7695-2687-X
ASCII Text
x 
 
Phi-Hung Pham, Yogendera Kumar, Chulwoo Kim, "High Performance and Area-Efficient Circuit-Switched Network on Chip Design," Computer and Information Technology, International Conference on, pp. 243, Sixth IEEE International Conference on Computer and Information Technology (CIT'06), 2006.
 
 
BibTex
x
 
@article{ 10.1109/CIT.2006.97,
author = {Phi-Hung Pham and Yogendera Kumar and Chulwoo Kim},
title = {High Performance and Area-Efficient Circuit-Switched Network on Chip Design},
journal ={Computer and Information Technology, International Conference on},
volume = {0},
year = {2006},
isbn = {0-7695-2687-X},
pages = {243},
doi = {http://doi.ieeecomputersociety.org/10.1109/CIT.2006.97},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Computer and Information Technology, International Conference on
TI - High Performance and Area-Efficient Circuit-Switched Network on Chip Design
SN - 0-7695-2687-X
SP
EP
A1 - Phi-Hung Pham,
A1 - Yogendera Kumar,
A1 - Chulwoo Kim,
PY - 2006
KW - null
VL - 0
JA - Computer and Information Technology, International Conference on
ER -
 
Phi-Hung Pham, Korea University, Korea
Yogendera Kumar, Korea University, Korea
Chulwoo Kim, Korea University, Korea
High performance and area-efficient circuitswitched on chip network using 4x4 folded torus topology with simple router architecture and circuit setup scheme is presented. When designed (synthesized and simulated) and analyzed for performance in 0.18?m process technology, the pre-layout area of each router is found to be 0.018 mm2 and the minimum probing period as 2.2 ns. The proposed NoC supports the wave-pipelining transmission across multi-clock domain environment to achieve the high throughput and energy efficiency.
Citation:
Phi-Hung Pham, Yogendera Kumar, Chulwoo Kim, "High Performance and Area-Efficient Circuit-Switched Network on Chip Design," cit, pp.243, Sixth IEEE International Conference on Computer and Information Technology (CIT'06), 2006
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