The increasing complexity of hardware features for re- cent processors makes high performance code genera- tion very challenging. In particular, several optimiza- tion targets have to be pursued simultaneously (minimizing L1/L2/L3/TLB misses and maximizing instruction level par- allelism). Very often, these optimization goals impose dif- ferent and contradictory constraints on the transformations to be applied.

We propose a new hierarchical compilation approach for the generation of high performance code relying on the use of state-of-the-art compilers. This approach is not application-dependent and do not require any assembly hand-coding. It relies on the decomposition of the origi- nal loop nest into simpler kernels, typically 1D to 2D loops, much simpler to optimize.

We successfully applied this approach to optimize dense matrix muliply primitives (not only for the square case but to the more general rectangular cases) and convolution. The performance of the optimized codes on Itanium 2 and Pentium 4 architectures outperforms ATLAS and in most cases, matches hand-tuned vendor libraries (e.g. MKL).