Parallel processing between GPU and CPU: Concepts in a game architecture

	This Article
	Subscribers, please Login Purchase article: $19 PDF IEEE Xplore Subscribers RSS feed
	Share
	Email this Article to a friend
	Bibliographic References
	ASCII Text BibTex RefWorks Procite/RefMan/Endnote
	Add to:
	Digg Furl Spurl Blink Simpy Google Del.icio.us Y!MyWeb
	Search
	Similar Articles Articles by Marcelo Panaro de Moraes Zamith Articles by Esteban W.G. Clua Articles by Aura Conci Articles by Anselmo Montenegro Articles by Paulo A. Pagliosa Articles by Luis Valente

Computer Graphics, Imaging and Visualisation (CGIV 2007)

Bangkok, Thailand

August 14-August 17

ISBN: 0-7695-2928-3

	ASCII Text	x
	Marcelo Panaro de Moraes Zamith, Esteban W.G. Clua, Aura Conci, Anselmo Montenegro, Paulo A. Pagliosa, Luis Valente, "Parallel processing between GPU and CPU: Concepts in a game architecture," Computer Graphics, Imaging and Visualization, International Conference on, pp. 115-120, Computer Graphics, Imaging and Visualisation (CGIV 2007), 2007.

	BibTex	x
	@article{ 10.1109/CGIV.2007.64, author = {Marcelo Panaro de Moraes Zamith and Esteban W.G. Clua and Aura Conci and Anselmo Montenegro and Paulo A. Pagliosa and Luis Valente}, title = {Parallel processing between GPU and CPU: Concepts in a game architecture}, journal ={Computer Graphics, Imaging and Visualization, International Conference on}, volume = {0}, year = {2007}, isbn = {0-7695-2928-3}, pages = {115-120}, doi = {http://doi.ieeecomputersociety.org/10.1109/CGIV.2007.64}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Computer Graphics, Imaging and Visualization, International Conference on TI - Parallel processing between GPU and CPU: Concepts in a game architecture SN - 0-7695-2928-3 SP115 EP120 A1 - Marcelo Panaro de Moraes Zamith, A1 - Esteban W.G. Clua, A1 - Aura Conci, A1 - Anselmo Montenegro, A1 - Paulo A. Pagliosa, A1 - Luis Valente, PY - 2007 KW - game loop KW - GPGPU KW - process distribution. VL - 0 JA - Computer Graphics, Imaging and Visualization, International Conference on ER -

Marcelo Panaro de Moraes Zamith, Universidade Federal Fluminense, Brazil

Esteban W.G. Clua, Universidade Federal Fluminense, Brazil

Aura Conci, Universidade Federal Fluminense, Brazil

Anselmo Montenegro, Universidade Federal Fluminense, Brazil

Paulo A. Pagliosa, Universidade Federal de Mato Grosso do Sul, Brazil

Luis Valente, PUC-Rio, Brazil

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/CGIV.2007.64

This paper presents a new game loop architecture concept that employs graphics processors (GPUs) for general-purpose computation (GPGPU). A critical issue in this field is the concept of process distribution between CPU and GPU. The presented architecture consists in a very efficient model for distribution, and it was mainly designed to support math and physics on the GPU, but any kind of generic computation can be easily adapted.

Index Terms:

game loop, GPGPU, process distribution.

Citation:

Marcelo Panaro de Moraes Zamith, Esteban W.G. Clua, Aura Conci, Anselmo Montenegro, Paulo A. Pagliosa, Luis Valente, "Parallel processing between GPU and CPU: Concepts in a game architecture," cgiv, pp.115-120, Computer Graphics, Imaging and Visualisation (CGIV 2007), 2007

Peer Review Notice | Give Us Feedback

Usage of this product signifies your acceptance of the Terms of Use.