Fifth IEEE International Workshop on Computer Architectures for Machine Perception (CAMP'00)
A VLSI Architecture for Image Sequence Segmentation using Edge Fusion
Padova, Italy
September 11-September 13
ISBN: 0-7695-0740-9
Jinsang Kim, Dept. of Electr. & Comput. Eng., Colorado State Univ., Fort Collins, CO, USA
T. Chen, Dept. of Electr. & Comput. Eng., Colorado State Univ., Fort Collins, CO, USA
We propose a segmentation scheme and its VLSI edge fusion architecture for image sequences which provides initial region information for the semantic object representation of image sequences. The proposed scheme incorporates static and dynamic features simultaneously in one scheme. The segmentation results of both gray level image sequences and color image sequences are evaluated using a evaluation metric. Also, based on complexity analysis of the segmentation scheme, the edge fusion is the bottleneck of fast image sequence segmentation. The proposed VLSI architecture makes it possible to the image sequence segmentation in real-time.
Index Terms:
image sequences; image sequence segmentation; edge fusion; VLSI architecture; segmentation; VLSI edge fusion architecture; image sequences; gray level; complexity analysis
Citation:
Jinsang Kim, T. Chen, "A VLSI Architecture for Image Sequence Segmentation using Edge Fusion," camp, pp.57, Fifth IEEE International Workshop on Computer Architectures for Machine Perception (CAMP'00), 2000
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