High Speed Target Tracking Vision Chip

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Fifth IEEE International Workshop on Computer Architectures for Machine Perception (CAMP'00)

Padova, Italy

September 11-September 13

ISBN: 0-7695-0740-9

	ASCII Text	x
	T. Komuro, I. Ishii, M. Ishikawa, A. Yoshida, "High Speed Target Tracking Vision Chip," Computer Architectures for Machine Perception, International Workshop on, pp. 49, Fifth IEEE International Workshop on Computer Architectures for Machine Perception (CAMP'00), 2000.

	BibTex	x
	@article{ 10.1109/CAMP.2000.875958, author = {T. Komuro and I. Ishii and M. Ishikawa and A. Yoshida}, title = {High Speed Target Tracking Vision Chip}, journal ={Computer Architectures for Machine Perception, International Workshop on}, volume = {0}, year = {2000}, isbn = {0-7695-0740-9}, pages = {49}, doi = {http://doi.ieeecomputersociety.org/10.1109/CAMP.2000.875958}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Computer Architectures for Machine Perception, International Workshop on TI - High Speed Target Tracking Vision Chip SN - 0-7695-0740-9 SP EP A1 - T. Komuro, A1 - I. Ishii, A1 - M. Ishikawa, A1 - A. Yoshida, PY - 2000 KW - target tracking; target tracking; vision chip; chip architecture; high speed target tracking VL - 0 JA - Computer Architectures for Machine Perception, International Workshop on ER -

T. Komuro, Dept. of Math. Eng. & Inf. Phys., Tokyo Univ., Japan

I. Ishii, Dept. of Math. Eng. & Inf. Phys., Tokyo Univ., Japan

M. Ishikawa, Dept. of Math. Eng. & Inf. Phys., Tokyo Univ., Japan

A. Yoshida, Dept. of Math. Eng. & Inf. Phys., Tokyo Univ., Japan

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/CAMP.2000.875958

This paper describes a new vision chip architecture for high speed target tracking. The system speed and pixel size improved by hardware implementation of a special algorithm which utilizes a property of high speed vision. Using an asynchronous and bit-serial propagation method, global moments of the image are calculated at high speed and with small circuits. Based on the new architecture a 64/spl times/64 pixel prototype chip has been developed.

Index Terms:

target tracking; target tracking; vision chip; chip architecture; high speed target tracking

Citation:

T. Komuro, I. Ishii, M. Ishikawa, A. Yoshida, "High Speed Target Tracking Vision Chip," camp, pp.49, Fifth IEEE International Workshop on Computer Architectures for Machine Perception (CAMP'00), 2000

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