The Acadia Vision Processor

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	Similar Articles Articles by G. Van der Wal Articles by M. Hansen Articles by M. Piacentino

Fifth IEEE International Workshop on Computer Architectures for Machine Perception (CAMP'00)

Padova, Italy

September 11-September 13

ISBN: 0-7695-0740-9

	ASCII Text	x
	G. Van der Wal, M. Hansen, M. Piacentino, "The Acadia Vision Processor," Computer Architectures for Machine Perception, International Workshop on, pp. 31, Fifth IEEE International Workshop on Computer Architectures for Machine Perception (CAMP'00), 2000.

	BibTex	x
	@article{ 10.1109/CAMP.2000.875956, author = {G. Van der Wal and M. Hansen and M. Piacentino}, title = {The Acadia Vision Processor}, journal ={Computer Architectures for Machine Perception, International Workshop on}, volume = {0}, year = {2000}, isbn = {0-7695-0740-9}, pages = {31}, doi = {http://doi.ieeecomputersociety.org/10.1109/CAMP.2000.875956}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Computer Architectures for Machine Perception, International Workshop on TI - The Acadia Vision Processor SN - 0-7695-0740-9 SP EP A1 - G. Van der Wal, A1 - M. Hansen, A1 - M. Piacentino, PY - 2000 KW - computer vision; Acadia vision processor; vision chip; video-processing chip; pyramid-based vision; 80 GOPS; video rate vision; real-time video stabilization; mosaicking; video fusion; motion-stereo; video enhancement VL - 0 JA - Computer Architectures for Machine Perception, International Workshop on ER -

G. Van der Wal, Sarnoff Corp., USA

M. Hansen, Sarnoff Corp., USA

M. Piacentino, Sarnoff Corp., USA

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/CAMP.2000.875956

Presented is a new 80 GOPS video-processing chip capable of performing video rate vision applications. These applications include real-time video stabilization, mosaicking, video fusion, motion-stereo and video enhancement. The new vision chip, code-named Acadia, is the result of over 15 years of research and development by Sarnoff in the areas of multi-resolution pyramid-based vision processing and efficient computational architectures. The Acadia chip represents the third generation of ASIC technology developed by Sarnoff, and incorporates the processing functions found in Sarnoff's earlier PYR-1 and PYR-2 pyramid processing chips as well as numerous other functions found in Sarnoff-developed video processing systems, including the PVT200. A demonstration board is being implemented and includes two video decoders, a video encoder and a PCI interface.

Index Terms:

computer vision; Acadia vision processor; vision chip; video-processing chip; pyramid-based vision; 80 GOPS; video rate vision; real-time video stabilization; mosaicking; video fusion; motion-stereo; video enhancement

Citation:

G. Van der Wal, M. Hansen, M. Piacentino, "The Acadia Vision Processor," camp, pp.31, Fifth IEEE International Workshop on Computer Architectures for Machine Perception (CAMP'00), 2000

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