loading...
 This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
14th Asian Test Symposium (ATS'05)
Design of a CMOS Operational Amplifier for Extreme-Voltage Stress Test
Calcutta, India
December 18-December 21
ISBN: 0-7695-2481-8
ASCII Text
x 
 
Shaolei Quan, Qiang Qiang, Chin-Long Wey, "Design of a CMOS Operational Amplifier for Extreme-Voltage Stress Test," Asian Test Symposium, pp. 70-75, 14th Asian Test Symposium (ATS'05), 2005.
 
 
BibTex
x
 
@article{ 10.1109/ATS.2005.49,
author = {Shaolei Quan and Qiang Qiang and Chin-Long Wey},
title = {Design of a CMOS Operational Amplifier for Extreme-Voltage Stress Test},
journal ={Asian Test Symposium},
volume = {0},
year = {2005},
issn = {1081-7735},
pages = {70-75},
doi = {http://doi.ieeecomputersociety.org/10.1109/ATS.2005.49},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Asian Test Symposium
TI - Design of a CMOS Operational Amplifier for Extreme-Voltage Stress Test
SN - 1081-7735
SP70
EP75
A1 - Shaolei Quan,
A1 - Qiang Qiang,
A1 - Chin-Long Wey,
PY - 2005
KW - null
VL - 0
JA - Asian Test Symposium
ER -
 
Shaolei Quan, Michigan State University, US
Qiang Qiang, Synopsys, Inc.
Chin-Long Wey, Natinal Central University, Taiwan
Previous work on extreme-voltage stress test of analog ICs has suffered either from time-costly circuit-level simulation or from the considerable number of bits in the control signal added to circuit for stress operation. This paper presents several fully-stressable circuit structures the appropriate use of which in analog ICs eliminates the need for extra control bits. Based on proposed circuit concepts an operational amplifier is designed in TSMC 0.18?m CMOS technology and is simulated with HSPICE. Simulation results have shown that the designed operational amplifier is fully stressable with minor performance degradation.
Citation:
Shaolei Quan, Qiang Qiang, Chin-Long Wey, "Design of a CMOS Operational Amplifier for Extreme-Voltage Stress Test," ats, pp.70-75, 14th Asian Test Symposium (ATS'05), 2005
Usage of this product signifies your acceptance of the Terms of Use.