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14th Asian Test Symposium (ATS'05)
Crosstalk Fault Detection for Interconnection Lines Based on Path Delay Inertia Principle
Calcutta, India
December 18-December 21
ISBN: 0-7695-2481-8
Ming-Shae Wu, National Chiao Tung University, Taiwan
Chung-Len Lee, National Chiao Tung University, Taiwan
Yeong-Jar Chang, Industrical Technology Research Institute, Taiwan
Wen-Ching Wu, Industrical Technology Research Institute, Taiwan
The crosstalk fault becomes more and more important in the deep submicron SoC and its detection involves sophisticated timing measurement. In this paper, a new test scheme to detect the crosstalk fault, based on the path delay inertia, for interconnection lines in SoC is proposed. The scheme, without using timing measurement, applies a transition on the aggressor line and a critical width pulse, CWP, to the victim line and detects the propagation of the CWP at the output of the victim line. The scheme is simple and simulation analysis and experiments show that it is effective in detecting crosstalk faults.
Citation:
Ming-Shae Wu, Chung-Len Lee, Yeong-Jar Chang, Wen-Ching Wu, "Crosstalk Fault Detection for Interconnection Lines Based on Path Delay Inertia Principle," ats, pp.106-111, 14th Asian Test Symposium (ATS'05), 2005
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