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13th Asian Test Symposium (ATS'04)
A New Path Delay Test Scheme Based on Path Delay Inertia
Kenting, Taiwan
November 15-November 17
ISBN: 0-7695-2235-1
ASCII Text
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Chung Liang Chen, Chung Len Lee, Ming-Shae Wu, "A New Path Delay Test Scheme Based on Path Delay Inertia," Asian Test Symposium, pp. 140-144, 13th Asian Test Symposium (ATS'04), 2004.
 
 
BibTex
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@article{ 10.1109/ATS.2004.11,
author = {Chung Liang Chen and Chung Len Lee and Ming-Shae Wu},
title = {A New Path Delay Test Scheme Based on Path Delay Inertia},
journal ={Asian Test Symposium},
volume = {0},
year = {2004},
issn = {1081-7735},
pages = {140-144},
doi = {http://doi.ieeecomputersociety.org/10.1109/ATS.2004.11},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Asian Test Symposium
TI - A New Path Delay Test Scheme Based on Path Delay Inertia
SN - 1081-7735
SP140
EP144
A1 - Chung Liang Chen,
A1 - Chung Len Lee,
A1 - Ming-Shae Wu,
PY - 2004
KW - null
VL - 0
JA - Asian Test Symposium
ER -
 
Chung Liang Chen, National Chiao Tung University
Chung Len Lee, National Chiao Tung University
Ming-Shae Wu, National Chiao Tung University
This paper proposes a new path delay test scheme based on path delay inertia. The scheme only applies pulses of specified widths, which are proportional to path delays, to paths-under-test. It is simple, eliminating the conventional two-pattern test for delay faults. Issues, such as sensitivity of applied pulse widths w.r.t. path delay, related with the scheme were studied and an experimental chip was implemented to demonstrate the scheme.
Citation:
Chung Liang Chen, Chung Len Lee, Ming-Shae Wu, "A New Path Delay Test Scheme Based on Path Delay Inertia," ats, pp.140-144, 13th Asian Test Symposium (ATS'04), 2004
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