Eighth Asian Test Symposium (ATS'99)
Minimizing the Number of Programming Steps for Diagnosis of Interconnect Faults in FPGAs
Shanghai, China
November 16-November 18
ISBN: 0-7695-0315-2
This paper presents a procedure to diagnose single faults in SRAM Based FPGAs. The procedure is non-adaptive and requires six programming steps to give the ex-act position and type of any single fault in a FPGA. It is proved that the number of programming steps required for the procedure is minimal for a non-adaptive procedure with the given interconnect model.
Index Terms:
FPGA, Fault Detection, Fault Diagnosis
Citation:
Yinlei Yu, Jian Xu, Wei Kang Huang, Fabrizio Lombardi, "Minimizing the Number of Programming Steps for Diagnosis of Interconnect Faults in FPGAs," ats, pp.357, Eighth Asian Test Symposium (ATS'99), 1999
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