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Seventh Asian Test Symposium (ATS'98)
Test Pattern Generation for Column Compression Multiplier
Singapore
December 02-December 04
ISBN: 0-8186-8277-9
ASCII Text
x 
 
Pingying Zeng, Zhigang Mao, Yizheng Ye, Yuliang Deng, "Test Pattern Generation for Column Compression Multiplier," Asian Test Symposium, pp. 500, Seventh Asian Test Symposium (ATS'98), 1998.
 
 
BibTex
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@article{ 10.1109/ATS.1998.741663,
author = {Pingying Zeng and Zhigang Mao and Yizheng Ye and Yuliang Deng},
title = {Test Pattern Generation for Column Compression Multiplier},
journal ={Asian Test Symposium},
volume = {0},
year = {1998},
issn = {1081-7735},
pages = {500},
doi = {http://doi.ieeecomputersociety.org/10.1109/ATS.1998.741663},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Asian Test Symposium
TI - Test Pattern Generation for Column Compression Multiplier
SN - 1081-7735
SP
EP
A1 - Pingying Zeng,
A1 - Zhigang Mao,
A1 - Yizheng Ye,
A1 - Yuliang Deng,
PY - 1998
VL - 0
JA - Asian Test Symposium
ER -
 
When used as the building cell of a parallel multiplier, the (4,2) counter tree is better suited than a Wallace tree for a VLSI implementation because of its more regular structure. In this paper test pattern generation for the CC multipliers is presented following a brief introduction to the structure of the (4,2) counter and the column compression multiplier using a (4,2) counter as its building cell. In conclusion, less test patterns are enough to exhaustively test the CC multiplier.
Citation:
Pingying Zeng, Zhigang Mao, Yizheng Ye, Yuliang Deng, "Test Pattern Generation for Column Compression Multiplier," ats, pp.500, Seventh Asian Test Symposium (ATS'98), 1998
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