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13th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC'07)
The Vortex: A Superscalar Asynchronous Processor
Berkeley, California
March 12-March 14
ISBN: 0-7695-2771-X
Andrew Lines, Fulcrum Microsystems, Calabasas, CA, USA

The "Vortex" processor is a general purpose CPU with a novel architecture and instruction set. The pri- mary feature of the Vortex architecture is many par- allel function units which communicate through a cen- tral crossbar, instead of a traditional register file. In- structions are fetched in parallel by cache lines, as in a VLIW processor, but any data or structural dependen- cies are resolved deterministically by the hardware, as in a superscalar processor.

The prototype Vortex CPU supports a 32-bit integer datapath and executes up to 9 instructions per cycle. It uses the "integrated pipelining" asynchronous design style, was fabricated in 2001 in TSMC's 0.15um G pro- cess, and runs at a typical frequency of 475MHz. Al- though the Vortex CPU itself has not been commercial- ized, many of its component circuits have been used in the products of Fulcrum Microsystems.

Citation:
Andrew Lines, "The Vortex: A Superscalar Asynchronous Processor," async, pp.39-48, 13th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC'07), 2007
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