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13th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC'07)
Design of a High-Speed Asynchronous Turbo Decoder
Berkeley, California
March 12-March 14
ISBN: 0-7695-2771-X
Pankaj Golani, University of Southern California, Los Angeles
Georgios D. Dimou, University of Southern California, Los Angeles
Mallika Prakash, University of Southern California, Los Angeles
Peter A. Beerel, University of Southern California, Los Angeles
This paper explores the advantages of high performance asynchronous circuits in a semi-custom standard cell environment for high-throughput turbo coding. Turbo codes are high-performance error correction codes used in applications where maximal information transfer is needed over a limitedbandwidth communication link in the presence of data corrupting noise. Specifically we designed an asynchronous high-speed Turbo decoder that can be potentially used for new wireless communications protocols with close to OC-12 throughputs. The design has been implemented using a new static single-track-full-buffer (SSTFB) standard cell library in IBM 0.18?m technology that provides low latency, fast cycle-time, and more robustness to noise than previously studied single-track full-buffer technology (STFB). A high-speed synchronous counterpart using the same high-speed architecture is designed in the same technology for comparison. The results demonstrate that for a variety of network constraints, the asynchronous design provides advantages in throughput per area. Moreover, the asynchronous design can support very low-latency network constraints not achievable with the synchronous alternative.
Citation:
Pankaj Golani, Georgios D. Dimou, Mallika Prakash, Peter A. Beerel, "Design of a High-Speed Asynchronous Turbo Decoder," async, pp.49-59, 13th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC'07), 2007
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