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2007 Asia and South Pacific Design Automation Conference
Development of Low Power ISDB-T One-Segment Decoder by Mobile Multi-Media Engine SoC (S1G)
Yokohama
January 23-January 26
ISBN: 1-4244-0629-3
ASCII Text
x 
 
K. Mori, M. Suzuki, Y. Ohara, S. Matsuo, A. Asano, "Development of Low Power ISDB-T One-Segment Decoder by Mobile Multi-Media Engine SoC (S1G)," Asia and South Pacific Design Automation Conference, pp. 644-648, 2007 Asia and South Pacific Design Automation Conference, 2007.
 
 
BibTex
x
 
@article{ 10.1109/ASPDAC.2007.358059,
author = {K. Mori and M. Suzuki and Y. Ohara and S. Matsuo and A. Asano},
title = {Development of Low Power ISDB-T One-Segment Decoder by Mobile Multi-Media Engine SoC (S1G)},
journal ={Asia and South Pacific Design Automation Conference},
volume = {0},
year = {2007},
isbn = {1-4244-0629-3},
pages = {644-648},
doi = {http://doi.ieeecomputersociety.org/10.1109/ASPDAC.2007.358059},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Asia and South Pacific Design Automation Conference
TI - Development of Low Power ISDB-T One-Segment Decoder by Mobile Multi-Media Engine SoC (S1G)
SN - 1-4244-0629-3
SP644
EP648
A1 - K. Mori,
A1 - M. Suzuki,
A1 - Y. Ohara,
A1 - S. Matsuo,
A1 - A. Asano,
PY - 2007
KW - null
VL - 0
JA - Asia and South Pacific Design Automation Conference
ER -
 
K. Mori, Toshiba Corporation Semiconductor Company, 580-1 Horikawa-Cho, Saiwai-ku, Kawasaki 212-8520, Japan
M. Suzuki, Toshiba Corporation Digital Media Network Company, 2-9 Suehiro-Cho, Ome, Tokyo 198-8710, Japan
Y. Ohara, Toshiba Corporation Semiconductor Company, 580-1 Horikawa-Cho, Saiwai-ku, Kawasaki 212-8520, Japan
S. Matsuo, Toshiba Corporation Semiconductor Company, 580-1 Horikawa-Cho, Saiwai-ku, Kawasaki 212-8520, Japan
A. Asano, Toshiba Corporation Digital Media Network Company, 2-9 Suehiro-Cho, Ome, Tokyo 198-8710, Japan
TOSHIBA has developed mobile multi-media engine SoC, we call as S1G, which can realize low power ISDB-T one-segment decode in 42mW for eight months short period of time. Since MPEG2 TS (transport stream) de-multiplexing, AAC decoding and H.264 decoding should be simultaneously processed in ISDB-T one-segment decode, two TOSHIBA MeP (Media embedded Processor) processors and one DSP and hardware blocks are used effectively with pipeline operation in this LSI. Although it is generally considered that dedicated hardware accelerator should be used to realize low power operation for ISDB-T one-segment decode, TOSHBA succeeded in developing low power ISDB-T one-segment decoder using maximum software resources.
Citation:
K. Mori, M. Suzuki, Y. Ohara, S. Matsuo, A. Asano, "Development of Low Power ISDB-T One-Segment Decoder by Mobile Multi-Media Engine SoC (S1G)," asp-dac, pp.644-648, 2007 Asia and South Pacific Design Automation Conference, 2007
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