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2007 Asia and South Pacific Design Automation Conference
Development of Low-power and Real-time VC-1/H.264/MPEG-4 Video Processing Hardware
Yokohama
January 23-January 26
ISBN: 1-4244-0629-3
M. Hase, Dept. of Syst. Design 3, Renesas Technol. Corp., Tokyo
This paper covers a multi-functional hardware intellectual property (IP) for the encoding and decoding of digital moving pictures with low power consumption. The IP is mainly intended for mobile products such as cellular phones, digital still cameras (DSCs), and digital video cameras (DVCs). It includes VC-1 functionality for Internet content plus AVC (H.264) functionality for digital television broadcasting and MPEG-4 functionality for TV telephony, and is capable of processing D1-sized moving pictures (720 pixels by 480 lines) in real time at an operating frequency of 54 MHz. In addition, original algorithms employed in the IP reduce power consumption by up to 22%.
Index Terms:
54 MHz, real-time VC-1/H.264/MPEG-4 video processing hardware, multifunctional hardware intellectual property, encoding, decoding, digital moving pictures, mobile products, VC-1 functionality, Internet content, AVC functionality, digital television broadcasting, MPEG-4 functionality, TV telephony
Citation:
M. Hase, K. Akie, M. Nobori, K. Matsumoto, "Development of Low-power and Real-time VC-1/H.264/MPEG-4 Video Processing Hardware," asp-dac, pp.637-643, 2007 Asia and South Pacific Design Automation Conference, 2007
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