2007 Asia and South Pacific Design Automation Conference A Parameterized Architecture Model in High Level Synthesis for Image Processing Applications Yokohama January 23-January 26 ISBN: 1-4244-0629-3
Most image processing applications are computationally intensive and data intensive. Reconfigurable hardware boards provide a convenient and flexible solution to speed up these algorithms. To get a high performance design without going through the time-consuming hardware design process for each different algorithm, we present a universal parameterized architecture in high level synthesis to generate the hardware frames for all image processing applications automatically. The value of the parameters which decide the target architecture can be obtained from the compiler. The algorithm how to get these parameters is also discussed in this paper.
Citation:
Yazhuo Dong, Yong Dou, "A Parameterized Architecture Model in High Level Synthesis for Image Processing Applications," asp-dac, pp.523-528, 2007 Asia and South Pacific Design Automation Conference, 2007 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||