2007 Asia and South Pacific Design Automation Conference
Flexible and Executable Hardware/Software Interface Modeling for Multiprocessor SoC Design Using SystemC
Yokohama
January 23-January 26
ISBN: 1-4244-0629-3
At high abstraction level, multi-processor system-on-chip (SoC) designs are specified as assembling of IP's which can be hardware or software. The refinement of communication between these different IP's, known as hardware/software interfaces, is widely seen as the design bottleneck due to their complexity. In order to perform early design validation and architecture exploration, flexible executable models of these interfaces are needed at different abstraction levels. In this paper, we define a unified methodology to implement executable models of the hardware/software interface based on SystemC. The proposed formalism based on the concept of services gives to this approach the flexibility needed for architecture exploration and the ability to be used in automatic generation tools. A case study of hardware/software interface modeling at the transaction accurate level is presented. Experimental results show that this method allows higher simulation speed with early performance estimation.
Index Terms:
transaction accurate level, hardware/software interface modeling, multiprocessor SoC design, system-on-chip, SystemC, abstraction level, architecture exploration, automatic generation tools
Citation:
P. Gerin, null Hao Shen, A. Chureau, A. Bouchhima, A. Jerraya, "Flexible and Executable Hardware/Software Interface Modeling for Multiprocessor SoC Design Using SystemC," asp-dac, pp.390-395, 2007 Asia and South Pacific Design Automation Conference, 2007