Robust Analog Circuit Sizing Using Ellipsoid Method and Affine Arithmetic

	This Article
	Subscribers, please Login Purchase article: $19 PDF IEEE Xplore Subscribers RSS feed
	Share
	Email this Article to a friend
	Bibliographic References
	ASCII Text BibTex RefWorks Procite/RefMan/Endnote
	Add to:
	Digg Furl Spurl Blink Simpy Google Del.icio.us Y!MyWeb
	Search
	Similar Articles Articles by Xuexin Liu Articles by Wai-Shing Luk Articles by Yu Song Articles by Pushan Tang Articles by Xuan Zeng

2007 Asia and South Pacific Design Automation Conference

Yokohama

January 23-January 26

ISBN: 1-4244-0629-3

	ASCII Text	x
	Xuexin Liu, Wai-Shing Luk, Yu Song, Pushan Tang, Xuan Zeng, "Robust Analog Circuit Sizing Using Ellipsoid Method and Affine Arithmetic," Asia and South Pacific Design Automation Conference, pp. 203-208, 2007 Asia and South Pacific Design Automation Conference, 2007.

	BibTex	x
	@article{ 10.1109/ASPDAC.2007.357986, author = {Xuexin Liu and Wai-Shing Luk and Yu Song and Pushan Tang and Xuan Zeng}, title = {Robust Analog Circuit Sizing Using Ellipsoid Method and Affine Arithmetic}, journal ={Asia and South Pacific Design Automation Conference}, volume = {0}, year = {2007}, isbn = {1-4244-0629-3}, pages = {203-208}, doi = {http://doi.ieeecomputersociety.org/10.1109/ASPDAC.2007.357986}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Asia and South Pacific Design Automation Conference TI - Robust Analog Circuit Sizing Using Ellipsoid Method and Affine Arithmetic SN - 1-4244-0629-3 SP203 EP208 A1 - Xuexin Liu, A1 - Wai-Shing Luk, A1 - Yu Song, A1 - Pushan Tang, A1 - Xuan Zeng, PY - 2007 KW - null VL - 0 JA - Asia and South Pacific Design Automation Conference ER -

Xuexin Liu, ASIC&System State Key Lab., Microelectronics Dept., Fudan University, Shanghai 200433, P.R.China

Wai-Shing Luk, luk@fudan.edu.cn

Yu Song, ASIC&System State Key Lab., Microelectronics Dept., Fudan University, Shanghai 200433, P.R.China

Pushan Tang, ASIC&System State Key Lab., Microelectronics Dept., Fudan University, Shanghai 200433, P.R.China

Xuan Zeng, ASIC&System State Key Lab., Microelectronics Dept., Fudan University, Shanghai 200433, P.R.China

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ASPDAC.2007.357986

Analog circuit sizing under process/parameter variations is formulated as a mini-max geometric programming problem. To tackle such problem, we present a new method that combines the ellipsoidmethod and affine arithmetic. Affine arithmetic is not only used for keeping tracks of variations and correlations, but also helps to determine the sub-gradient at each iteration of the ellipsoid method. An example of designing a CMOS operational amplifier is given to demonstrate the effectiveness of the proposed method. Finally numerical results are verified by SPICE simulation.

Citation:

Xuexin Liu, Wai-Shing Luk, Yu Song, Pushan Tang, Xuan Zeng, "Robust Analog Circuit Sizing Using Ellipsoid Method and Affine Arithmetic," asp-dac, pp.203-208, 2007 Asia and South Pacific Design Automation Conference, 2007

Peer Review Notice | Give Us Feedback

Usage of this product signifies your acceptance of the Terms of Use.