2007 Asia and South Pacific Design Automation Conference Robust Analog Circuit Sizing Using Ellipsoid Method and Affine Arithmetic Yokohama January 23-January 26 ISBN: 1-4244-0629-3
Analog circuit sizing under process/parameter variations is formulated as a mini-max geometric programming problem. To tackle such problem, we present a new method that combines the ellipsoidmethod and affine arithmetic. Affine arithmetic is not only used for keeping tracks of variations and correlations, but also helps to determine the sub-gradient at each iteration of the ellipsoid method. An example of designing a CMOS operational amplifier is given to demonstrate the effectiveness of the proposed method. Finally numerical results are verified by SPICE simulation.
Citation:
Xuexin Liu, Wai-Shing Luk, Yu Song, Pushan Tang, Xuan Zeng, "Robust Analog Circuit Sizing Using Ellipsoid Method and Affine Arithmetic," asp-dac, pp.203-208, 2007 Asia and South Pacific Design Automation Conference, 2007 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||