2007 Asia and South Pacific Design Automation Conference
Bisection Based Placement for the X Architecture
Yokohama
January 23-January 26
ISBN: 1-4244-0629-3
Satoshi Ono, Computer Science Department, SUNY Binghamton, Box 6000, Binghamton NY 13902. satoshi@binghamton.edu
Sameer Tilak, San Diego Supercomputer Center. sameer@sdsc.edu
Patrick H. Madden, Computer Science Department, SUNY Binghamton, Box 6000, Binghamton NY 13902. pmadden@acm.org
Rising interconnect delay and power consumption have motivated the investigation of alternative integrated circuit routing architectures. In particular, the X Architecture, which features preferred routing in diagonal directions, has gained a measure of industry support, and has even been validated at 65nm. While there has been extensive study of Manhattan design methods, there are markedly fewer published results for non-Manhattan design. To help fill this gap, we study a patented placement method for the X Architecture; to our knowledge, there have been no prior published results for the method. Surprisingly, we find that the patented method in fact performs worse than traditional Manhattan methods - for both Manhattan and X routing metrics. We also present a theoretic formulation which explains why solution quality is degraded. Many groups in industry are evaluating the merits of non-Manhattan routing architectures. By providing concrete experimental results, we hope to improve the accuracy of these evaluations.
Citation:
Satoshi Ono, Sameer Tilak, Patrick H. Madden, "Bisection Based Placement for the X Architecture," asp-dac, pp.153-158, 2007 Asia and South Pacific Design Automation Conference, 2007