2007 Asia and South Pacific Design Automation Conference A Multi-Drop Transmission-Line Interconnect in Si LSI Yokohama January 23-January 26 ISBN: 1-4244-0629-3
This paper proposes a branching method for on-chip transmission line (TL) interconnects, which can reduce delay and power of global interconnects. A 6-mm-long TL interconnect with a branch is fabricated by using a 0.18?m standard Si CMOS process, and the measurement result performs 4 Gbps signal transmission.
Citation:
Junki Seita, Hiroyuki Ito, Kenichi Okada, Takashi Sato, Kazuya Masu, "A Multi-Drop Transmission-Line Interconnect in Si LSI," asp-dac, pp.118-119, 2007 Asia and South Pacific Design Automation Conference, 2007 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||