2007 Asia and South Pacific Design Automation Conference
Single-Issue 1500MIPS Embedded DSP with Ultra Compact Codes
Yokohama
January 23-January 26
ISBN: 1-4244-0629-3
Li-Chun Lin, Department of Electronics Engineering, National Chiao Tung University, Taiwan
Shih-Hao Ou, Department of Electronics Engineering, National Chiao Tung University, Taiwan
Tay-Jyi Lin, Department of Electronics Engineering, National Chiao Tung University, Taiwan
Siang-Den Deng, Department of Electronics Engineering, National Chiao Tung University, Taiwan
Chih-Wei Liu, Department of Electronics Engineering, National Chiao Tung University, Taiwan
The performance of single-issue RISC cores can be improved significantly with multi-issue architectures (i.e. superscalar or VLIW) by activating the parallel functional units concurrently. However, they suffer high complexity or huge code sizes. In this paper, we borrow some ideas from old vector machines and propose a novel DSP architecture with very compact codes. In our simulations, the DSP has comparable performance to a 5-issue VLIW core with identical computing resources. However, its code sizes are greatly reduced. The DSP core has been implemented in the TSMC 0.13um CMOS technology, where the operating frequency is 305MHz and the core size is 1.45?1.4 mm2 including 12KB on-chip memory.
Citation:
Li-Chun Lin, Shih-Hao Ou, Tay-Jyi Lin, Siang-Den Deng, Chih-Wei Liu, "Single-Issue 1500MIPS Embedded DSP with Ultra Compact Codes," asp-dac, pp.110-111, 2007 Asia and South Pacific Design Automation Conference, 2007
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