2007 Asia and South Pacific Design Automation Conference Reconfigurable CMOS Low Noise Amplifier Using Variable Bias Circuit for Self Compensation Yokohama January 23-January 26 ISBN: 1-4244-0629-3
This paper proposes a self compensation technique. For LNAs, large power gain and large input signal results in too large output signal and distortion. To make matters worse, input power varies by process variation, temperature, simulation error, and so on. To solve the problem, the proposed LNA is equipped with variable bias circuit and can be reconfigured by bias voltage of transistors. It contributes to power reduction, compensation of intermodulation. The proposed LNA achieves more than 33 dBm in DeltaIM3, if the input power increases more than -30 dBm. Moreover the output power is less than about -12 dBm, which is 87 % of power reduction.
Index Terms:
intermodulation compensation, reconfigurable CMOS low noise amplifier, variable bias circuit, self compensation, power reduction
Citation:
S. Fukuda, D. Kawazoe, K. Okada, K. Masu, "Reconfigurable CMOS Low Noise Amplifier Using Variable Bias Circuit for Self Compensation," asp-dac, pp.104-105, 2007 Asia and South Pacific Design Automation Conference, 2007 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
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