2007 Asia and South Pacific Design Automation Conference
Design of Active Substrate Noise Canceller using Power Supply di/dt Detector
Yokohama
January 23-January 26
ISBN: 1-4244-0629-3
Taisuke Kazama, Department of Electronic Engineering, University of Tokyo, 7-3-1 Hongo, Bunkyo-ku, Tokyo 113-8656, J
Toru Nakura, Department of Electronic Engineering, University of Tokyo, 7-3-1 Hongo, Bunkyo-ku, Tokyo 113-8656, J
Makoto Ikeda, Department of Electronic Engineering, University of Tokyo, 7-3-1 Hongo, Bunkyo-ku, Tokyo 113-8656, J
Kunihiro Asada, Department of Electronic Engineering, University of Tokyo, 7-3-1 Hongo, Bunkyo-ku, Tokyo 113-8656, J
As the growing demand of mixed-signal designs as A/D, D/A and PLL integrated with large scale digital circuits, substrate noise becomes serious concern. On the other hand, the remedies using guard ring and decoupling capacitor do not have enough efficiency against high frequency noise due to their parasitic component. To supress the impact of substrate noise, on-chip active noise cancelling technique using di/dt detector has been proposed[1][2][3]. This aper introduces an example design of feedforward active substrate noise canceling technique using multiple power supply di/dt detector and demonstrates the noise cancelling results by the measurement of 0.35 ?m CMOS test chip.
Citation:
Taisuke Kazama, Toru Nakura, Makoto Ikeda, Kunihiro Asada, "Design of Active Substrate Noise Canceller using Power Supply di/dt Detector," asp-dac, pp.100-101, 2007 Asia and South Pacific Design Automation Conference, 2007
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