Reconfigurable Hardware and Software Architectural Constructs for the Enablement of Resilient Computing Systems

A
ASAP
2006
IEEE 17th International Conference on Application-specific Systems, Architectures and Processors (ASAP'06)
Abstract - Reconfigurable Hardware and Software Architectural Constructs for the Enablement of Resilient Computing Systems

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IEEE 17th International Conference on Application-specific Systems, Architectures and Processors (ASAP'06)

Steamboat Springs, Colorado, USA

September 11-September 13

ISBN: 0-7695-2682-9

	ASCII Text	x
	Paul L. Master, "Reconfigurable Hardware and Software Architectural Constructs for the Enablement of Resilient Computing Systems," Application-Specific Systems, Architectures and Processors, IEEE International Conference on, pp. 50-55, IEEE 17th International Conference on Application-specific Systems, Architectures and Processors (ASAP'06), 2006.

	BibTex	x
	@article{ 10.1109/ASAP.2006.59, author = {Paul L. Master}, title = {Reconfigurable Hardware and Software Architectural Constructs for the Enablement of Resilient Computing Systems}, journal ={Application-Specific Systems, Architectures and Processors, IEEE International Conference on}, volume = {0}, year = {2006}, issn = {1063-6862}, pages = {50-55}, doi = {http://doi.ieeecomputersociety.org/10.1109/ASAP.2006.59}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Application-Specific Systems, Architectures and Processors, IEEE International Conference on TI - Reconfigurable Hardware and Software Architectural Constructs for the Enablement of Resilient Computing Systems SN - 1063-6862 SP50 EP55 A1 - Paul L. Master, PY - 2006 KW - null VL - 0 JA - Application-Specific Systems, Architectures and Processors, IEEE International Conference on ER -

Paul L. Master, Director of Technology, ElementCXI

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ASAP.2006.59

This paper introduces the concepts underlying a new digital computational fabric called an Elemental Computing Array (ECA). This computation fabric is designed to implement logic resiliency at the very lowest level of design. Current design practices assume the inherent unreliability of silicon dedicated to memory functions, the inherent unreliability of interconnects at the box, board and IC level yet paradoxically still assumes full reliability of silicon dedicated to logic functions. The combination of software constructs and hardware architectural constructs in the ECA architecture allows system designs to become inherently resilient to fabrication defects, run-time transient faults and device wear out faults.

Citation:

Paul L. Master, "Reconfigurable Hardware and Software Architectural Constructs for the Enablement of Resilient Computing Systems," asap, pp.50-55, IEEE 17th International Conference on Application-specific Systems, Architectures and Processors (ASAP'06), 2006

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