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IEEE 17th International Conference on Application-specific Systems, Architectures and Processors (ASAP'06)
A Design Methodology for Hardware Acceleration of Adaptive Filter Algorithms in Image Processing
Steamboat Springs, Colorado, USA
September 11-September 13
ISBN: 0-7695-2682-9
ASCII Text
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Hritam Dutta, Frank Hannig, Jurgen Teich, Benno Heigl, Heinz Hornegger, "A Design Methodology for Hardware Acceleration of Adaptive Filter Algorithms in Image Processing," Application-Specific Systems, Architectures and Processors, IEEE International Conference on, pp. 331-340, IEEE 17th International Conference on Application-specific Systems, Architectures and Processors (ASAP'06), 2006.
 
 
BibTex
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@article{ 10.1109/ASAP.2006.4,
author = {Hritam Dutta and Frank Hannig and Jurgen Teich and Benno Heigl and Heinz Hornegger},
title = {A Design Methodology for Hardware Acceleration of Adaptive Filter Algorithms in Image Processing},
journal ={Application-Specific Systems, Architectures and Processors, IEEE International Conference on},
volume = {0},
year = {2006},
issn = {1063-6862},
pages = {331-340},
doi = {http://doi.ieeecomputersociety.org/10.1109/ASAP.2006.4},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Application-Specific Systems, Architectures and Processors, IEEE International Conference on
TI - A Design Methodology for Hardware Acceleration of Adaptive Filter Algorithms in Image Processing
SN - 1063-6862
SP331
EP340
A1 - Hritam Dutta,
A1 - Frank Hannig,
A1 - Jurgen Teich,
A1 - Benno Heigl,
A1 - Heinz Hornegger,
PY - 2006
KW - null
VL - 0
JA - Application-Specific Systems, Architectures and Processors, IEEE International Conference on
ER -
 
Hritam Dutta, University of Erlangen-Nuremberg, Germany
Frank Hannig, University of Erlangen-Nuremberg, Germany
Jurgen Teich, University of Erlangen-Nuremberg, Germany
Benno Heigl, Siemens AG, Medical Solutions (AX), Forchheim, Germany.
Heinz Hornegger, Siemens AG, Medical Solutions (AX), Forchheim, Germany.
Massively parallel processor array architectures can be used as hardware accelerators for a plenty of dataflow dominant applications. Bilateral filtering is an example of a state-of-the-art algorithm in medical imaging, which falls in the class of 2D adaptive filter algorithms. In this paper, we propose a semi-automatic mapping methodology for the generation of hardware accelerators for such a generic class of adaptive filtering applications in image processing. The final architecture deliver similar synthesis results as a hand-tuned design.
Citation:
Hritam Dutta, Frank Hannig, Jurgen Teich, Benno Heigl, Heinz Hornegger, "A Design Methodology for Hardware Acceleration of Adaptive Filter Algorithms in Image Processing," asap, pp.331-340, IEEE 17th International Conference on Application-specific Systems, Architectures and Processors (ASAP'06), 2006
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