IEEE 17th International Conference on Application-specific Systems, Architectures and Processors (ASAP'06)
Buffer and register allocation for memory space optimization
Steamboat Springs, Colorado, USA
September 11-September 13
ISBN: 0-7695-2682-9
In today?s embedded systems, memory hierarchy is rapidly becoming a major factor in terms of power, performance and area. This is especially true for embedded multimedia applications using temporary multi-dimensional arrays that are typically used to store intermediate results during multimedia processing. In this paper, we propose a new technique that optimizes the use of caches and registers. It consists in combining buffer and register allocation to reduce the size of the temporary arrays. We use the concept of live data to replace each array by a smaller buffer. We then replace references to this buffer by registers. The experiments are made on a Unix environment and on the StepNP simulator. Our results show that our technique yields significant reduction of the number of data cache misses.
Citation:
Y. Bouchebaba, G. Nicolescu, El. Aboulhamid, F. Coelho, "Buffer and register allocation for memory space optimization," asap, pp.283-290, IEEE 17th International Conference on Application-specific Systems, Architectures and Processors (ASAP'06), 2006