IEEE 17th International Conference on Application-specific Systems, Architectures and Processors (ASAP'06) 2D-VLIW: An Architecture Based on the Geometry of Computation Steamboat Springs, Colorado, USA September 11-September 13 ISBN: 0-7695-2682-9
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ASAP.2006.1
This work proposes a new architecture and execution model called 2D-VLIW. This architecture adopts an execution model based on large pieces of computation running over a matrix of functional units connected by a set of local register spread across the matrix. Experiments using the Mediabench and SPECint00 programs and the Trimaran compiler show performance gains ranging from 5% to 63%, when comparing our proposal to an EPIC architecture with the same number of registers and functional units. We also show that the g721-enc program running on a 2D-VLIW 3?3 matrix had a speedup of 1.37 over a 2?2 matrix while the same program over the EPIC processor with 9 functional units had a speedup of 1.12 over an EPIC processor with 4 functional units. For some internal procedures from Mediabench and SPECint programs, the average 2D-VLIW OPC (operations per cycle) was up to 10 times greater than for the equivalent EPIC processor.
Citation:
Ricardo Santos, Rodolfo Azevedo, Guido Araujo, "2D-VLIW: An Architecture Based on the Geometry of Computation," asap, pp.87-94, IEEE 17th International Conference on Application-specific Systems, Architectures and Processors (ASAP'06), 2006 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||