2005 IEEE International Conference on Application-Specific Systems, Architecture Processors (ASAP'05) Zippy - A coarse-grained reconfigurable array with support for hardware virtualization Samos, Greece July 23-July 25 ISBN: 0-7695-2407-9
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ASAP.2005.69
This paper motivates the use of hardware virtualization on coarse-grained reconfigurable architectures. We introduce Zippy, a coarse-grained multi-context hybrid CPU with architectural support for efficient hardware virtualization. The architectural details and the corresponding tool flow are outlined. As a case study, we compare the nonvirtualized and the virtualized execution of an ADPCM decoder.
Citation:
Christian Plessl, Marco Platzner, "Zippy - A coarse-grained reconfigurable array with support for hardware virtualization," asap, pp.213-218, 2005 IEEE International Conference on Application-Specific Systems, Architecture Processors (ASAP'05), 2005 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||