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2005 IEEE International Conference on Application-Specific Systems, Architecture Processors (ASAP'05)
Multiply-Accumulate Architecture for a Special Class of Optimal Extension Fields
Samos, Greece
July 23-July 25
ISBN: 0-7695-2407-9
Moboluwaji O. Sanu, Department of Electrical & Computer Engineering The University of Texas at Austin
Earl E. Jr. Swartzlander, Department of Electrical & Computer Engineering The University of Texas at Austin

Finite field arithmetic is useful in the implementation of error-correcting codes as well as cryptographic protocols. Large finite field numbers are particularly important in the implementation of elliptic curve cryptography. This paper presents a multiply-accumulate architecture for multipliers over a special class of Type II Optimal Extension Fields (OEFs). Type II OEFs are Galois fields Gf(p^m) with p a pseudo-Mersenne prime of the form p = 2^n - c, where c is "small", and an irreducible binomial of the form f(z) = z^m - 2 exists over GF(p). The Type II OEF multiplier presented uses merged arithmetic to combine multiple multiply and addition operations together. Unlike previous work, the multiplier also performs subfield and extension field reduction in parallel for this class of finite fields. Though the multiplier design requires large silicon area for practical implementation, it obviates the need for performing subfield and extension field reduction separately, thereby reducing the overall delay.

Citation:
Moboluwaji O. Sanu, Earl E. Jr. Swartzlander, "Multiply-Accumulate Architecture for a Special Class of Optimal Extension Fields," asap, pp.134-139, 2005 IEEE International Conference on Application-Specific Systems, Architecture Processors (ASAP'05), 2005
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