2005 IEEE International Conference on Application-Specific Systems, Architecture Processors (ASAP'05)
An Image Processor for Digital Film
Samos, Greece
July 23-July 25
ISBN: 0-7695-2407-9
DOI Bookmark:
http://doi.ieeecomputersociety.org/10.1109/ASAP.2005.13
This paper presents an FPGA based hardware architecture, named FlexWAFE, for high resolution, high troughput real-time digital film processing. Complex algorithms require several hundred arithmetic operations per pixel which is beyond the scope of current DSP processors. To simplify programming and yet achieve high clock rates, the architecture combines component configuration with weak programmability. It alleviates the memory bottleneck by an efficient use of internal memory blocks and a multi-stream SDRAM memory scheduler with tightly bounded latency. Several examples of a Discrete Wavelet Transform and a complex noise reducer demonstrate the architecture efficiency.
Index Terms:
weak-programing, stream-based architechture,digital .lm, recon.gurable, FPGA
Citation:
Amilcar do Carmo Lucas, Rolf Ernst, "An Image Processor for Digital Film," asap, pp.219-224, 2005 IEEE International Conference on Application-Specific Systems, Architecture Processors (ASAP'05), 2005
Usage of this product signifies your acceptance of the
Terms of Use.
|
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||