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14th IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP'03)
Variable-Length Instruction Compression for Area Minimization
The Hague, The Netherlands
June 24-June 26
ISBN: 0-7695-1992-X
ASCII Text
x 
 
Piia Simonen, Ilkka Saastamoinen, Jari Nurmi, "Variable-Length Instruction Compression for Area Minimization," Application-Specific Systems, Architectures and Processors, IEEE International Conference on, pp. 155, 14th IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP'03), 2003.
 
 
BibTex
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@article{ 10.1109/ASAP.2003.1212839,
author = {Piia Simonen and Ilkka Saastamoinen and Jari Nurmi},
title = {Variable-Length Instruction Compression for Area Minimization},
journal ={Application-Specific Systems, Architectures and Processors, IEEE International Conference on},
volume = {0},
year = {2003},
issn = {1063-6862},
pages = {155},
doi = {http://doi.ieeecomputersociety.org/10.1109/ASAP.2003.1212839},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Application-Specific Systems, Architectures and Processors, IEEE International Conference on
TI - Variable-Length Instruction Compression for Area Minimization
SN - 1063-6862
SP
EP
A1 - Piia Simonen,
A1 - Ilkka Saastamoinen,
A1 - Jari Nurmi,
PY - 2003
KW - null
VL - 0
JA - Application-Specific Systems, Architectures and Processors, IEEE International Conference on
ER -
 
Piia Simonen, Institute of Digital and Computer Systems, Tampere University of Technology
Ilkka Saastamoinen, Institute of Digital and Computer Systems, Tampere University of Technology
Jari Nurmi, Institute of Digital and Computer Systems, Tampere University of Technology
Memories comprise a significant part of chips in embedded applications, thus also contributing considerably to the costs. This paper presents a variable-length compression scheme for reducing program memory footprint in a 32-bit DSP processor. The compression method is based on a static program code analysis. Short operand fields do not provide sufficient repetition individually, so the compression is realized by handling all operands of an instruction as one field. The more a certain operand combination is used, the shorter it is coded. The original combination is placed on a look-up table and the coded bit pattern forms an index to that table. The compression results that are achieved in two test applications are 46% (audio decoder) and 51% (video decoder).
Citation:
Piia Simonen, Ilkka Saastamoinen, Jari Nurmi, "Variable-Length Instruction Compression for Area Minimization," asap, pp.155, 14th IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP'03), 2003
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