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14th IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP'03)
Energy Aware Register File Implementation through Instruction Predecode
The Hague, The Netherlands
June 24-June 26
ISBN: 0-7695-1992-X
Jose L. Ayala, Departamento de Ingenier?a Electronica
Marisa Lopez-Vallejo, Departamento de Ingenier?a Electronica
Alexander Veidenbaum, Center for Embedded Computer Systems
Carlos A. Lopez, Departamento de Ingenier?a Electronica
The register .le is a power-hungry device in modern architectures. Current research on compiler technology and computer architectures encourages the implementation of larger devices to feed multiple data paths and to store global variables. However, low power techniques are not able to appreciably reduce power consumption in this device without a time penalty. This paper introduces an efficient hardware approach to reduce the register .le energy consumption by turning unused registers into a low power state. Bypassing the register fields of the fetch instruction to the decode stage allows the identification of registers required by the current instruction (instruction predecode) and allows the control logic to turn them back on. They are put into the low-power state after the instruction use. This technique achieves an 85% energy reduction with no performance penalty. The simplicity of the approach makes it an effective low-power technique for embedded processors.
Citation:
Jose L. Ayala, Marisa Lopez-Vallejo, Alexander Veidenbaum, Carlos A. Lopez, "Energy Aware Register File Implementation through Instruction Predecode," asap, pp.86, 14th IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP'03), 2003
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