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12th IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP'00)
Partitioning Conditional Data Flow Graphs for Embedded System Design
Boston, Massachusetts
July 10-July 12
ISBN: 0-7695-0716-6
ASCII Text
x 
 
M. Auguin, L. Bianco, L. Capella, E. Gresset, "Partitioning Conditional Data Flow Graphs for Embedded System Design," Application-Specific Systems, Architectures and Processors, IEEE International Conference on, pp. 339, 12th IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP'00), 2000.
 
 
BibTex
x
 
@article{ 10.1109/ASAP.2000.862404,
author = {M. Auguin and L. Bianco and L. Capella and E. Gresset},
title = {Partitioning Conditional Data Flow Graphs for Embedded System Design},
journal ={Application-Specific Systems, Architectures and Processors, IEEE International Conference on},
volume = {0},
year = {2000},
issn = {1063-6862},
pages = {339},
doi = {http://doi.ieeecomputersociety.org/10.1109/ASAP.2000.862404},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Application-Specific Systems, Architectures and Processors, IEEE International Conference on
TI - Partitioning Conditional Data Flow Graphs for Embedded System Design
SN - 1063-6862
SP
EP
A1 - M. Auguin,
A1 - L. Bianco,
A1 - L. Capella,
A1 - E. Gresset,
PY - 2000
KW - System synthesis
KW - partitioning
KW - dynamic data flow
VL - 0
JA - Application-Specific Systems, Architectures and Processors, IEEE International Conference on
ER -
 
M. Auguin, Universit? de Nice Sophia Antipolis
L. Bianco, Universit? de Nice Sophia Antipolis
L. Capella, Philips Semiconductors Sophia
E. Gresset, Philips Semiconductors Sophia
The complexity of embedded applications increases continuously. Integration advances provides a rising range of possibilities to implement a system on a chip. The designers are faced to the difficult challenge to select the right units to implement the application functionalities so that the silicon area is minimized and the time constraints of the application are met. This paper presents an effective method to design system architectures, which operates on a conditional data flow graph, which is well suited to represent signal processing applications.
Index Terms:
System synthesis, partitioning, dynamic data flow
Citation:
M. Auguin, L. Bianco, L. Capella, E. Gresset, "Partitioning Conditional Data Flow Graphs for Embedded System Design," asap, pp.339, 12th IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP'00), 2000
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