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12th IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP'00)
A Booth Multiplier Accepting Both a Redundant or a Non-Redundant Input with No Additional Delay
Boston, Massachusetts
July 10-July 12
ISBN: 0-7695-0716-6
Marc Daumas, INRIA
David W. Matula, Southern Methodist University
Past recoders have added critical path delay for the more frequent case where both inputs are non redundant. Our proposed circuit does not lengthen the time of one multiplication compared to the state-of-the-art encoding, if both inputs are non redundant. We have slightly modified an existing cell to accept a redundant binary number in place of the non-redundant number by changing some connections. The recoding operators associated to a high level quantity (the fraction range) all defined in this paper are used to rule out some possibilities as inputs of this newly created cell. We check that the modified cell yields the correct output for the remaining possible inputs.
Citation:
Marc Daumas, David W. Matula, "A Booth Multiplier Accepting Both a Redundant or a Non-Redundant Input with No Additional Delay," asap, pp.205, 12th IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP'00), 2000
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