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1997 IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP'97)
Libraries of schedule-free operators in Alpha
Zurich, SWITZERLAND
July 14-July 16
ISBN: 0-8186-7958-1
ASCII Text
x 
 
F. de Dinechin, "Libraries of schedule-free operators in Alpha," Application-Specific Systems, Architectures and Processors, IEEE International Conference on, pp. 239, 1997 IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP'97), 1997.
 
 
BibTex
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@article{ 10.1109/ASAP.1997.606830,
author = {F. de Dinechin},
title = {Libraries of schedule-free operators in Alpha},
journal ={Application-Specific Systems, Architectures and Processors, IEEE International Conference on},
volume = {0},
year = {1997},
issn = {1063-6862},
pages = {239},
doi = {http://doi.ieeecomputersociety.org/10.1109/ASAP.1997.606830},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - CONF
JO - Application-Specific Systems, Architectures and Processors, IEEE International Conference on
TI - Libraries of schedule-free operators in Alpha
SN - 1063-6862
SP
EP
A1 - F. de Dinechin,
PY - 1997
KW - digital circuits; schedule-free operators; affine recurrence equations; digital circuits synthesis; parallelism; bit-level; arithmetic operators; binary implementation; bit-level dependency analysis; bit-parallel array; matrix-vector product
VL - 0
JA - Application-Specific Systems, Architectures and Processors, IEEE International Conference on
ER -
 
F. de Dinechin, IRISA, Rennes, France
This paper presents a method, based on the formalism of affine recurrence equations, for the synthesis of digital circuits exploiting parallelism at the bit-level. In the initial specification of a numerical algorithm, the arithmetic operators are replaced with their yet unscheduled (schedule-free) binary implementation as recurrence equations. This allows a bit-level dependency analysis yielding a bit-parallel array. The method is demonstrated on the example of the matrix-vector product, and discussed.
Index Terms:
digital circuits; schedule-free operators; affine recurrence equations; digital circuits synthesis; parallelism; bit-level; arithmetic operators; binary implementation; bit-level dependency analysis; bit-parallel array; matrix-vector product
Citation:
F. de Dinechin, "Libraries of schedule-free operators in Alpha," asap, pp.239, 1997 IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP'97), 1997
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