1996 IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP'96)
Reconfigurable Processing With Field Programmable Gate Arrays
Chicago, IL
August 19-August 23
ISBN: 0-8186-7542-X
In-system-programmable, SRAM-based Field Programmable Gate Arrays (FPGAs) can be used to create processors and coprocessors whose internal architecture as well as interconnections can be reconfigured to match the needs of a given application. Exploiting the inherent speed and parallelism of a hardware solution, FPGA-based coprocessors can execute computationally-intensive tasks while maintaining the flexibility of a programmable solution. The successes of this approach have led to the introduction of the first FPGA devices designed for coprocessing applications; the XC6200 FPGA architecture features an SRAM control store, abundant registers, on-chip memory capability, support for high-speed full or partial reconfiguration, and a flexible, hierarchical routing scheme.
Index Terms:
field programmable gate arrays; reconfigurable architectures; coprocessors; SRAM chips; reconfigurable processing; SRAM-based field programmable gate arrays; processors; coprocessors; internal architecture; interconnections; computationally-intensive tasks; programmable solution; XC6200 FPGA architecture; SRAM control store; on-chip memory capability
Citation:
B.K. Fawcett, J. Watson, "Reconfigurable Processing With Field Programmable Gate Arrays," asap, pp.293, 1996 IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP'96), 1996