Scheduling of Partitioned Regular Algorithms on Processor Arrays with Constrained Resources

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1996 IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP'96)

Chicago, IL

August 19-August 23

ISBN: 0-8186-7542-X

	ASCII Text	x
	Jurgen Teich, Lothar Thiele, Li Zhang, "Scheduling of Partitioned Regular Algorithms on Processor Arrays with Constrained Resources," Application-Specific Systems, Architectures and Processors, IEEE International Conference on, pp. 131, 1996 IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP'96), 1996.

	BibTex	x
	@article{ 10.1109/ASAP.1996.542808, author = {Jurgen Teich and Lothar Thiele and Li Zhang}, title = {Scheduling of Partitioned Regular Algorithms on Processor Arrays with Constrained Resources}, journal ={Application-Specific Systems, Architectures and Processors, IEEE International Conference on}, volume = {0}, year = {1996}, issn = {1063-6862}, pages = {131}, doi = {http://doi.ieeecomputersociety.org/10.1109/ASAP.1996.542808}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Application-Specific Systems, Architectures and Processors, IEEE International Conference on TI - Scheduling of Partitioned Regular Algorithms on Processor Arrays with Constrained Resources SN - 1063-6862 SP EP A1 - Jurgen Teich, A1 - Lothar Thiele, A1 - Li Zhang, PY - 1996 KW - Partitioning KW - Processor Arrays KW - Scheduling VL - 0 JA - Application-Specific Systems, Architectures and Processors, IEEE International Conference on ER -

Jurgen Teich, Institute TIK ETH Zurich, Gloriastrasse 35 CH-8092 Zurich, Switzerland

Lothar Thiele, Institute TIK ETH Zurich, Gloriastrasse 35 CH-8092 Zurich, Switzerland

Li Zhang, Institute TIK ETH Zurich, Gloriastrasse 35 CH-8092 Zurich, Switzerland

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ASAP.1996.542808

A single integer linear programming model for optimally scheduling partitioned regular algorithms is presented. The herein presented methodology differs from existing methods in the following capabilities: 1) Not only constraints on the number of available processors and communication capabilities are taken into account, but also processor caches and constraints on the size of available memories are modeled and taken into account in the optimization model. 2) Different types of processors can be handled. 3) The size of the optimization model (number of integer variables) is independent of the size of the tiles to be executed. Hence, 4) the number of integer variables in the optimization model is greatly reduced such that problems of relevant size can be solved in practical execution time.

Index Terms:

Partitioning, Processor Arrays, Scheduling

Citation:

Jurgen Teich, Lothar Thiele, Li Zhang, "Scheduling of Partitioned Regular Algorithms on Processor Arrays with Constrained Resources," asap, pp.131, 1996 IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP'96), 1996

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