Finite Word-Length Effects Of An Unified Systolic Array For 2-D DCT/IDCT

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1996 IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP'96)

Chicago, IL

August 19-August 23

ISBN: 0-8186-7542-X

	ASCII Text	x
	H. Lim, C. Yim, E.E. Swartzlander, Jr., "Finite Word-Length Effects Of An Unified Systolic Array For 2-D DCT/IDCT," Application-Specific Systems, Architectures and Processors, IEEE International Conference on, pp. 35, 1996 IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP'96), 1996.

	BibTex	x
	@article{ 10.1109/ASAP.1996.542799, author = {H. Lim and C. Yim and E.E. Swartzlander, Jr.}, title = {Finite Word-Length Effects Of An Unified Systolic Array For 2-D DCT/IDCT}, journal ={Application-Specific Systems, Architectures and Processors, IEEE International Conference on}, volume = {0}, year = {1996}, issn = {1063-6862}, pages = {35}, doi = {http://doi.ieeecomputersociety.org/10.1109/ASAP.1996.542799}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Application-Specific Systems, Architectures and Processors, IEEE International Conference on TI - Finite Word-Length Effects Of An Unified Systolic Array For 2-D DCT/IDCT SN - 1063-6862 SP EP A1 - H. Lim, A1 - C. Yim, A1 - E.E. Swartzlander, Jr., PY - 1996 KW - error analysis; systolic arrays; discrete cosine transforms; roundoff errors; digital simulation; finite word-length effects; unified systolic array; fixed-point error analysis; discrete cosine transform; inverse discrete cosine transform; closed form expressions; fixed-point rounding-errors; truncation-errors; simulation results; minimum word-length; fixed-point error VL - 0 JA - Application-Specific Systems, Architectures and Processors, IEEE International Conference on ER -

H. Lim, Dept. of Electr. & Comput. Eng., Texas Univ., Austin, TX, USA

C. Yim, Dept. of Electr. & Comput. Eng., Texas Univ., Austin, TX, USA

E.E. Swartzlander, Jr., Dept. of Electr. & Comput. Eng., Texas Univ., Austin, TX, USA

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ASAP.1996.542799

This paper presents a fixed-point error analysis for the unified systolic array implementation of 2-dimensional (2-D) discrete cosine transform (DCT) and 2-D inverse discrete cosine transform (IDCT). Closed form expressions for the mean and variance of fixed-point rounding-errors and truncation-errors are derived. Simulation results are provided to verify the analysis. Simulations designed to find the minimum word-length which satisfies IEEE requirements for the implementation of an 8/spl times/8 IDCT are also performed. Simulation results show that the proposed systolic array is more robust for the fixed-point error than other existing implementations for DCT/IDCT.

Index Terms:

error analysis; systolic arrays; discrete cosine transforms; roundoff errors; digital simulation; finite word-length effects; unified systolic array; fixed-point error analysis; discrete cosine transform; inverse discrete cosine transform; closed form expressions; fixed-point rounding-errors; truncation-errors; simulation results; minimum word-length; fixed-point error

Citation:

H. Lim, C. Yim, E.E. Swartzlander, Jr., "Finite Word-Length Effects Of An Unified Systolic Array For 2-D DCT/IDCT," asap, pp.35, 1996 IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP'96), 1996

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