An array processor for inner product computations using a Fermat number ALU

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	Similar Articles Articles by W. Luo Articles by G.A. Jullien Articles by N.M. Wigley Articles by W.C. Miller Articles by Z. Wang

1995 IEEE International Conference on Application-Specific Array Processors (ASAP'95)

Strasbourg, France

July 24-July 26

ISBN: 0-8186-7109-2

	ASCII Text	x
	W. Luo, G.A. Jullien, N.M. Wigley, W.C. Miller, Z. Wang, "An array processor for inner product computations using a Fermat number ALU," Application-Specific Systems, Architectures and Processors, IEEE International Conference on, pp. 270, 1995 IEEE International Conference on Application-Specific Array Processors (ASAP'95), 1995.

	BibTex	x
	@article{ 10.1109/ASAP.1995.522931, author = {W. Luo and G.A. Jullien and N.M. Wigley and W.C. Miller and Z. Wang}, title = {An array processor for inner product computations using a Fermat number ALU}, journal ={Application-Specific Systems, Architectures and Processors, IEEE International Conference on}, volume = {0}, year = {1995}, issn = {1063-6862}, pages = {270}, doi = {http://doi.ieeecomputersociety.org/10.1109/ASAP.1995.522931}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Application-Specific Systems, Architectures and Processors, IEEE International Conference on TI - An array processor for inner product computations using a Fermat number ALU SN - 1063-6862 SP EP A1 - W. Luo, A1 - G.A. Jullien, A1 - N.M. Wigley, A1 - W.C. Miller, A1 - Z. Wang, PY - 1995 KW - parallel architectures; residue number systems; inner product computations; Fermat number ALU; parallel independent computations; polynomial mapping; computational ring VL - 0 JA - Application-Specific Systems, Architectures and Processors, IEEE International Conference on ER -

W. Luo, VLSI Res. Group, Windsor Univ., Ont., Canada

G.A. Jullien, VLSI Res. Group, Windsor Univ., Ont., Canada

N.M. Wigley, VLSI Res. Group, Windsor Univ., Ont., Canada

W.C. Miller, VLSI Res. Group, Windsor Univ., Ont., Canada

Z. Wang, VLSI Res. Group, Windsor Univ., Ont., Canada

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ASAP.1995.522931

This paper explores an architecture for parallel independent computations of inner products over the direct product ring /spl Rfr//sub 257/spl times/17/. The structure is based on the polynomial mapping of the Modulus Replication RNS for calculations over dynamic ranges much larger than the product of the computational moduli. We show that the computational ring is optimal for our purposes, and introduce basic cells for the efficient calculation of all elements of the polynomial ring computations.

Index Terms:

parallel architectures; residue number systems; inner product computations; Fermat number ALU; parallel independent computations; polynomial mapping; computational ring

Citation:

W. Luo, G.A. Jullien, N.M. Wigley, W.C. Miller, Z. Wang, "An array processor for inner product computations using a Fermat number ALU," asap, pp.270, 1995 IEEE International Conference on Application-Specific Array Processors (ASAP'95), 1995

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