2001 Conference on Advanced Research in VLSI (ARVLSI'01) Analog MAP Decoder for (8, 4) Hamming Code in Subthreshold CMOS Salt Lake City, Utah March 14-March 16 ISBN: 0-7695-1038-8
An all-MOS analog implementation of a MAP decoder is presented for the (8, 4) extended Hamming code. This paper describes the design and analysis of a tail-biting trellis decoder implementation using subthreshold CMOS devices. A VLSI test chip has recently returned from fabrication, and preliminary test results indicate accurate decoding up to 20 MBit/s.
Citation:
Chris Winstead, Jie Dai, Woo Jin Kim, Scott Little, Yong-Bin Kim, Chris Myers, Christian Schlegel, "Analog MAP Decoder for (8, 4) Hamming Code in Subthreshold CMOS," arvlsi, pp.132, 2001 Conference on Advanced Research in VLSI (ARVLSI'01), 2001 Usage of this product signifies your acceptance of the Terms of Use. | |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||