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17th Conference on Advanced Research in VLSI (ARVLSI '97)
Architectural Design of a Three Dimensional FPGA
Ann Arbor, MI
September 15-September 16
ISBN: 0-8186-7913-1
Waleed M. Meleis, Northeastern University
Miriam Leeser, Northeastern University
Paul Zavracky, Northeastern University
Mankuan M. Vai, Northeastern University
The design and evaluation of a 3-dimensional FPGA architecture called Rothko will be described. Rothko takes advantage of a novel 3-dimensional VLSI circuit technology developed at Northeastern University that is based on transferred circuits with interconnections between layers of circuits. The Rothko 3-D FPGA architecture is based on a sea-of-gates FPGA model first proposed in the Triptych architecture (a 2-D architecture) in which individual cells have the dual functions of routing and logic implementation. Our 3-D VLSI technology allows metal interconnections to be made between cells on different layers so that Rothko is truly 3-D. A very fine-grain interconnection scheme is provided with each cell connected to the one above/below it. In this paper we present the architectural design of this 3-D FPGA. The 3-D technology that supports the Rothko architecture is also described. An example of mapping a combinational multiplier to both the Rothko and Triptych architectures is provided to demonstrate the advantages of Rothko.
Citation:
Waleed M. Meleis, Miriam Leeser, Paul Zavracky, Mankuan M. Vai, "Architectural Design of a Three Dimensional FPGA," arvlsi, pp.256, 17th Conference on Advanced Research in VLSI (ARVLSI '97), 1997
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