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17th Conference on Advanced Research in VLSI (ARVLSI '97)
Image Edge Enhancement, Dynamic Compression and Noise Suppression using Analog Circuit Processing
Ann Arbor, MI
September 15-September 16
ISBN: 0-8186-7913-1
Todd Hinck, VLSI and Neural Net Systems Laboratory, Boston University, College of Engineering
Allyn E. Hubbard, VLSI and Neural Net Systems Laboratory, Boston University, College of Engineering
We designed circuits that have potential use as preprocessors of noisy image data, which vary in intensity over as much as four orders of magnitude. The circuits are based on equations representing a stage of the Boundary Contour System/Feature Contour System model. We compared the model performance (equations) using Gaussian and exponential filters with the simulated circuit performance. Our circuits achieved compression of up to four orders of input range, while maintaining contrast ratios in local regions. Edge enhancement is maintained down to a SNR of -20 dB, and at that noise level the circuit's RMS error performance is comparable to that of the mathematical formulation. For quantitative display purposes, we present responses to test stimuli from a linear array of circuits. A 15 x 15 array design is also presented.
Index Terms:
Analog VLSI, Neural Network, Silicon Retina, Image Edge Enhancement, Spatial Filtering
Citation:
Todd Hinck, Allyn E. Hubbard, "Image Edge Enhancement, Dynamic Compression and Noise Suppression using Analog Circuit Processing," arvlsi, pp.114, 17th Conference on Advanced Research in VLSI (ARVLSI '97), 1997
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