A 590,000 transistor 48,000 pixel, contrast sensitive, edge enhancing, CMOS imager-silicon retina

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16th Conference on Advanced Research in VLSI (ARVLSI'95)

Chapel Hill, North Carolina

March 27-March 29

ISBN: 0-8186-7047-9

	ASCII Text	x
	A.G. Andreou, K.A. Boahen, "A 590,000 transistor 48,000 pixel, contrast sensitive, edge enhancing, CMOS imager-silicon retina," Advanced Research in VLSI, Conference on, pp. 225, 16th Conference on Advanced Research in VLSI (ARVLSI'95), 1995.

	BibTex	x
	@article{ 10.1109/ARVLSI.1995.515623, author = {A.G. Andreou and K.A. Boahen}, title = {A 590,000 transistor 48,000 pixel, contrast sensitive, edge enhancing, CMOS imager-silicon retina}, journal ={Advanced Research in VLSI, Conference on}, volume = {0}, year = {1995}, isbn = {0-8186-7047-9}, pages = {225}, doi = {http://doi.ieeecomputersociety.org/10.1109/ARVLSI.1995.515623}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Advanced Research in VLSI, Conference on TI - A 590,000 transistor 48,000 pixel, contrast sensitive, edge enhancing, CMOS imager-silicon retina SN - 0-8186-7047-9 SP EP A1 - A.G. Andreou, A1 - K.A. Boahen, PY - 1995 KW - CMOS integrated circuits; image sensors; focal planes; VLSI; computer vision; edge detection; contrast; CMOS imager; silicon retina; analog VLSI focal plane processor; phototransduction; local gain control; edge enhancement; single chip system; vertebrate distal retina; ultra low power dissipation; area efficiency; n-well double metal double poly digital oriented CMOS technology; current-mode subthreshold CMOS; 48000 pixel; 1.2 micron VL - 0 JA - Advanced Research in VLSI, Conference on ER -

A.G. Andreou, Dept. of Electr. & Comput. Eng., Johns Hopkins Univ., Baltimore, MD, USA

K.A. Boahen, Dept. of Electr. & Comput. Eng., Johns Hopkins Univ., Baltimore, MD, USA

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ARVLSI.1995.515623

We present an experimental analog VLSI focal plane processor for the phototransduction, local gain control and edge enhancement of natural images. The single chip system incorporates 590,000 transistors in 48,000 pixels, and it has been fabricated on a 9.5/spl times/9.3 mm die in a 1.2 /spl mu/m n-well double metal, double poly, digital oriented CMOS technology. The organization of the system abstracts from the structure and function of the vertebrate distal retina. The adopted design style, current-mode subthreshold CMOS using circuits of minimal complexity offers the possibility of ultra low power dissipation and area efficiency, commensurate with VLSI integration.

Index Terms:

CMOS integrated circuits; image sensors; focal planes; VLSI; computer vision; edge detection; contrast; CMOS imager; silicon retina; analog VLSI focal plane processor; phototransduction; local gain control; edge enhancement; single chip system; vertebrate distal retina; ultra low power dissipation; area efficiency; n-well double metal double poly digital oriented CMOS technology; current-mode subthreshold CMOS; 48000 pixel; 1.2 micron

Citation:

A.G. Andreou, K.A. Boahen, "A 590,000 transistor 48,000 pixel, contrast sensitive, edge enhancing, CMOS imager-silicon retina," arvlsi, pp.225, 16th Conference on Advanced Research in VLSI (ARVLSI'95), 1995

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