Low Latency Pipelined Circular CORDIC

A
ARITH
2005
17th IEEE Symposium on Computer Arithmetic (ARITH'05)
Abstract - Low Latency Pipelined Circular CORDIC

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	Similar Articles Articles by Elisardo Antelo Articles by Julio Villalba

17th IEEE Symposium on Computer Arithmetic (ARITH'05)

Cape Cod, Massachusetts, USA

June 27-June 29

ISBN: 0-7695-2366-8

	ASCII Text	x
	Elisardo Antelo, Julio Villalba, "Low Latency Pipelined Circular CORDIC," Computer Arithmetic, IEEE Symposium on, pp. 280-287, 17th IEEE Symposium on Computer Arithmetic (ARITH'05), 2005.

	BibTex	x
	@article{ 10.1109/ARITH.2005.30, author = {Elisardo Antelo and Julio Villalba}, title = {Low Latency Pipelined Circular CORDIC}, journal ={Computer Arithmetic, IEEE Symposium on}, volume = {0}, year = {2005}, issn = {1063-6889}, pages = {280-287}, doi = {http://doi.ieeecomputersociety.org/10.1109/ARITH.2005.30}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Computer Arithmetic, IEEE Symposium on TI - Low Latency Pipelined Circular CORDIC SN - 1063-6889 SP280 EP287 A1 - Elisardo Antelo, A1 - Julio Villalba, PY - 2005 KW - null VL - 0 JA - Computer Arithmetic, IEEE Symposium on ER -

Elisardo Antelo, University of Santiago

Julio Villalba, University of Málaga

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/ARITH.2005.30

The pipelined CORDIC with linear approximation to rotation has been proposed to achieve reductions in delay, power and area; however, the schemes for rotation (multiplication) and vectoring (division) complicate implementation in a single unit. In this work, we improve the linear approximation scheme, leading to a unified implementation for rotation and vectoring where fully parallel tree multipliers are used instead of the second half of CORDIC iterations. We also combine the linear approximation to rotation with the scale factor compensation so that the compensation is performed concurrently with the rotation process. Comparison with other designs is also provided.

Citation:

Elisardo Antelo, Julio Villalba, "Low Latency Pipelined Circular CORDIC," arith, pp.280-287, 17th IEEE Symposium on Computer Arithmetic (ARITH'05), 2005

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