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17th IEEE Symposium on Computer Arithmetic (ARITH'05)
Low Latency Digit-Recurrence Reciprocal and Square-Root Reciprocal Algorithm and Architecture
Cape Cod, Massachusetts, USA
June 27-June 29
ISBN: 0-7695-2366-8
Elisardo Antelo, University of Santiago
Tomás Lang, University of California at Irvine
Paolo Montuschi, Politechnico di Torino
Alberto Nannarelli, Technical University of Denmark
The reciprocol and square-root reciprocol operations are important in several applications. For these operations, we present algorithms that combine a digit-by-digit module and one iteration of a quadratic-convergence approximation. The latter is implemented by a digit-recurrence, which uses the digits produced by the digit-by-digit part. In this way, both parts execute in an overlapped manner, so that the total number of cycles is about half of the number that would be required by the digit-by-digit part alone. Because of the approximation, correct rounding of the result cannot be obtained directly in all cases; we propose a variable-time implementation that produces the correctly rounded result with a small average overhead. Radix-4 implementations are described and have been synthesized. They achieve the same cycle time as the standard digit-by-digit implementation, resulting in a speed-up of about 2 and, because of the approximation part, the area factor is also about 2. We also show a combined implementation for both operations that has essentially the same complexity as that for square-root reciprocol alone.
Citation:
Elisardo Antelo, Tomás Lang, Paolo Montuschi, Alberto Nannarelli, "Low Latency Digit-Recurrence Reciprocal and Square-Root Reciprocal Algorithm and Architecture," arith, pp.147-154, 17th IEEE Symposium on Computer Arithmetic (ARITH'05), 2005
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